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| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Qualcomm MSM8939 Camera Subsystem (CAMSS) |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Vincent Knecht <[email protected]> |
| 11 | + |
| 12 | +description: |
| 13 | + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms |
| 14 | + |
| 15 | +properties: |
| 16 | + compatible: |
| 17 | + const: qcom,msm8939-camss |
| 18 | + |
| 19 | + clocks: |
| 20 | + minItems: 24 |
| 21 | + maxItems: 24 |
| 22 | + |
| 23 | + clock-names: |
| 24 | + items: |
| 25 | + - const: top_ahb |
| 26 | + - const: ispif_ahb |
| 27 | + - const: csiphy0_timer |
| 28 | + - const: csiphy1_timer |
| 29 | + - const: csi0_ahb |
| 30 | + - const: csi0 |
| 31 | + - const: csi0_phy |
| 32 | + - const: csi0_pix |
| 33 | + - const: csi0_rdi |
| 34 | + - const: csi1_ahb |
| 35 | + - const: csi1 |
| 36 | + - const: csi1_phy |
| 37 | + - const: csi1_pix |
| 38 | + - const: csi1_rdi |
| 39 | + - const: csi2_ahb |
| 40 | + - const: csi2 |
| 41 | + - const: csi2_phy |
| 42 | + - const: csi2_pix |
| 43 | + - const: csi2_rdi |
| 44 | + - const: ahb |
| 45 | + - const: vfe0 |
| 46 | + - const: csi_vfe0 |
| 47 | + - const: vfe_ahb |
| 48 | + - const: vfe_axi |
| 49 | + |
| 50 | + interrupts: |
| 51 | + minItems: 7 |
| 52 | + maxItems: 7 |
| 53 | + |
| 54 | + interrupt-names: |
| 55 | + items: |
| 56 | + - const: csiphy0 |
| 57 | + - const: csiphy1 |
| 58 | + - const: csid0 |
| 59 | + - const: csid1 |
| 60 | + - const: csid2 |
| 61 | + - const: ispif |
| 62 | + - const: vfe0 |
| 63 | + |
| 64 | + iommus: |
| 65 | + maxItems: 1 |
| 66 | + |
| 67 | + power-domains: |
| 68 | + items: |
| 69 | + - description: VFE GDSC - Video Front End, Global Distributed Switch Controller. |
| 70 | + |
| 71 | + ports: |
| 72 | + $ref: /schemas/graph.yaml#/properties/ports |
| 73 | + |
| 74 | + description: |
| 75 | + CSI input ports. |
| 76 | + |
| 77 | + properties: |
| 78 | + port@0: |
| 79 | + $ref: /schemas/graph.yaml#/$defs/port-base |
| 80 | + unevaluatedProperties: false |
| 81 | + description: |
| 82 | + Input port for receiving CSI data. |
| 83 | + |
| 84 | + properties: |
| 85 | + endpoint: |
| 86 | + $ref: video-interfaces.yaml# |
| 87 | + unevaluatedProperties: false |
| 88 | + |
| 89 | + properties: |
| 90 | + data-lanes: |
| 91 | + minItems: 1 |
| 92 | + maxItems: 4 |
| 93 | + |
| 94 | + bus-type: |
| 95 | + enum: |
| 96 | + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY |
| 97 | + |
| 98 | + required: |
| 99 | + - data-lanes |
| 100 | + |
| 101 | + port@1: |
| 102 | + $ref: /schemas/graph.yaml#/$defs/port-base |
| 103 | + unevaluatedProperties: false |
| 104 | + description: |
| 105 | + Input port for receiving CSI data. |
| 106 | + |
| 107 | + properties: |
| 108 | + endpoint: |
| 109 | + $ref: video-interfaces.yaml# |
| 110 | + unevaluatedProperties: false |
| 111 | + |
| 112 | + properties: |
| 113 | + data-lanes: |
| 114 | + minItems: 1 |
| 115 | + maxItems: 4 |
| 116 | + |
| 117 | + bus-type: |
| 118 | + enum: |
| 119 | + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY |
| 120 | + |
| 121 | + required: |
| 122 | + - data-lanes |
| 123 | + |
| 124 | + reg: |
| 125 | + minItems: 11 |
| 126 | + maxItems: 11 |
| 127 | + |
| 128 | + reg-names: |
| 129 | + items: |
| 130 | + - const: csiphy0 |
| 131 | + - const: csiphy0_clk_mux |
| 132 | + - const: csiphy1 |
| 133 | + - const: csiphy1_clk_mux |
| 134 | + - const: csid0 |
| 135 | + - const: csid1 |
| 136 | + - const: csid2 |
| 137 | + - const: ispif |
| 138 | + - const: csi_clk_mux |
| 139 | + - const: vfe0 |
| 140 | + - const: vfe0_vbif |
| 141 | + |
| 142 | + vdda-supply: |
| 143 | + description: |
| 144 | + Definition of the regulator used as analog power supply. |
| 145 | + |
| 146 | +required: |
| 147 | + - clock-names |
| 148 | + - clocks |
| 149 | + - compatible |
| 150 | + - interrupt-names |
| 151 | + - interrupts |
| 152 | + - iommus |
| 153 | + - power-domains |
| 154 | + - reg |
| 155 | + - reg-names |
| 156 | + - vdda-supply |
| 157 | + |
| 158 | +additionalProperties: false |
| 159 | + |
| 160 | +examples: |
| 161 | + - | |
| 162 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 163 | + #include <dt-bindings/clock/qcom,gcc-msm8939.h> |
| 164 | +
|
| 165 | + camss: camss@1b0ac00 { |
| 166 | + compatible = "qcom,msm8939-camss"; |
| 167 | +
|
| 168 | + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, |
| 169 | + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, |
| 170 | + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, |
| 171 | + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, |
| 172 | + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, |
| 173 | + <&gcc GCC_CAMSS_CSI0_CLK>, |
| 174 | + <&gcc GCC_CAMSS_CSI0PHY_CLK>, |
| 175 | + <&gcc GCC_CAMSS_CSI0PIX_CLK>, |
| 176 | + <&gcc GCC_CAMSS_CSI0RDI_CLK>, |
| 177 | + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, |
| 178 | + <&gcc GCC_CAMSS_CSI1_CLK>, |
| 179 | + <&gcc GCC_CAMSS_CSI1PHY_CLK>, |
| 180 | + <&gcc GCC_CAMSS_CSI1PIX_CLK>, |
| 181 | + <&gcc GCC_CAMSS_CSI1RDI_CLK>, |
| 182 | + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, |
| 183 | + <&gcc GCC_CAMSS_CSI2_CLK>, |
| 184 | + <&gcc GCC_CAMSS_CSI2PHY_CLK>, |
| 185 | + <&gcc GCC_CAMSS_CSI2PIX_CLK>, |
| 186 | + <&gcc GCC_CAMSS_CSI2RDI_CLK>, |
| 187 | + <&gcc GCC_CAMSS_AHB_CLK>, |
| 188 | + <&gcc GCC_CAMSS_VFE0_CLK>, |
| 189 | + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, |
| 190 | + <&gcc GCC_CAMSS_VFE_AHB_CLK>, |
| 191 | + <&gcc GCC_CAMSS_VFE_AXI_CLK>; |
| 192 | +
|
| 193 | + clock-names = "top_ahb", |
| 194 | + "ispif_ahb", |
| 195 | + "csiphy0_timer", |
| 196 | + "csiphy1_timer", |
| 197 | + "csi0_ahb", |
| 198 | + "csi0", |
| 199 | + "csi0_phy", |
| 200 | + "csi0_pix", |
| 201 | + "csi0_rdi", |
| 202 | + "csi1_ahb", |
| 203 | + "csi1", |
| 204 | + "csi1_phy", |
| 205 | + "csi1_pix", |
| 206 | + "csi1_rdi", |
| 207 | + "csi2_ahb", |
| 208 | + "csi2", |
| 209 | + "csi2_phy", |
| 210 | + "csi2_pix", |
| 211 | + "csi2_rdi", |
| 212 | + "ahb", |
| 213 | + "vfe0", |
| 214 | + "csi_vfe0", |
| 215 | + "vfe_ahb", |
| 216 | + "vfe_axi"; |
| 217 | +
|
| 218 | + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, |
| 219 | + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, |
| 220 | + <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>, |
| 221 | + <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, |
| 222 | + <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>, |
| 223 | + <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>, |
| 224 | + <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; |
| 225 | +
|
| 226 | + interrupt-names = "csiphy0", |
| 227 | + "csiphy1", |
| 228 | + "csid0", |
| 229 | + "csid1", |
| 230 | + "csid2", |
| 231 | + "ispif", |
| 232 | + "vfe0"; |
| 233 | +
|
| 234 | + iommus = <&apps_iommu 3>; |
| 235 | +
|
| 236 | + power-domains = <&gcc VFE_GDSC>; |
| 237 | +
|
| 238 | + reg = <0x01b0ac00 0x200>, |
| 239 | + <0x01b00030 0x4>, |
| 240 | + <0x01b0b000 0x200>, |
| 241 | + <0x01b00038 0x4>, |
| 242 | + <0x01b08000 0x100>, |
| 243 | + <0x01b08400 0x100>, |
| 244 | + <0x01b08800 0x100>, |
| 245 | + <0x01b0a000 0x500>, |
| 246 | + <0x01b00020 0x10>, |
| 247 | + <0x01b10000 0x1000>, |
| 248 | + <0x01b40000 0x200>; |
| 249 | +
|
| 250 | + reg-names = "csiphy0", |
| 251 | + "csiphy0_clk_mux", |
| 252 | + "csiphy1", |
| 253 | + "csiphy1_clk_mux", |
| 254 | + "csid0", |
| 255 | + "csid1", |
| 256 | + "csid2", |
| 257 | + "ispif", |
| 258 | + "csi_clk_mux", |
| 259 | + "vfe0", |
| 260 | + "vfe0_vbif"; |
| 261 | +
|
| 262 | + vdda-supply = <®_2v8>; |
| 263 | +
|
| 264 | + ports { |
| 265 | + #address-cells = <1>; |
| 266 | + #size-cells = <0>; |
| 267 | + }; |
| 268 | +
|
| 269 | + }; |
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