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Use AArch64-only big.LITTLE cores to detect AArch32 ISA
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src/arm/linux/aarch32-isa.c

Lines changed: 42 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -68,11 +68,18 @@ void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo(
6868
* - Processors with Cortex-A75 cores
6969
* - Processors with Cortex-A76 cores
7070
* - Processors with Cortex-A77 cores
71+
* - Processors with Cortex-A78 cores
72+
* - Processors with Cortex-A510 cores
73+
* - Processors with Cortex-A710 cores
74+
* - Processors with Cortex-A715 cores
75+
* - Processors with Cortex-X1 cores
76+
* - Processors with Cortex-X2 cores
77+
* - Processors with Cortex-X3 cores
7178
* - Processors with Exynos M4 cores
7279
* - Processors with Exynos M5 cores
7380
* - Neoverse N1 cores
74-
* - Neoverse V1 cores
7581
* - Neoverse N2 cores
82+
* - Neoverse V1 cores
7683
*/
7784
if (chipset->series == cpuinfo_arm_chipset_series_samsung_exynos && chipset->model == 9810) {
7885
/* Only little cores of Exynos 9810 support FP16 & RDM */
@@ -83,11 +90,18 @@ void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo(
8390
case UINT32_C(0x4100D060): /* Cortex-A65 */
8491
case UINT32_C(0x4100D0A0): /* Cortex-A75 */
8592
case UINT32_C(0x4100D0B0): /* Cortex-A76 */
93+
case UINT32_C(0x4100D0C0): /* Neoverse N1 */
8694
case UINT32_C(0x4100D0D0): /* Cortex-A77 */
8795
case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
96+
case UINT32_C(0x4100D400): /* Neoverse V1 */
97+
case UINT32_C(0x4100D410): /* Cortex-A78 */
98+
case UINT32_C(0x4100D440): /* Cortex-X1 */
8899
case UINT32_C(0x4100D460): /* Cortex-A510 */
89100
case UINT32_C(0x4100D470): /* Cortex-A710 */
90101
case UINT32_C(0x4100D480): /* Cortex-X2 */
102+
case UINT32_C(0x4100D490): /* Neoverse N2 */
103+
case UINT32_C(0x4100D4D0): /* Cortex-A715 */
104+
case UINT32_C(0x4100D4E0): /* Cortex-X3 */
91105
case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
92106
case UINT32_C(0x51008020): /* Kryo 385 Gold (Cortex-A75) */
93107
case UINT32_C(0x51008030): /* Kryo 385 Silver (Cortex-A55) */
@@ -103,20 +117,43 @@ void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo(
103117

104118
/*
105119
* NEON VDOT instructions are not indicated in /proc/cpuinfo.
106-
* Use a MIDR-based heuristic to whitelist processors known to support it.
120+
* Use a MIDR-based heuristic to whitelist processors known to support it:
121+
* - Processors with Cortex-A65 cores
122+
* - Processors with Cortex-A76 cores
123+
* - Processors with Cortex-A77 cores
124+
* - Processors with Cortex-A78 cores
125+
* - Processors with Cortex-A510 cores
126+
* - Processors with Cortex-A710 cores
127+
* - Processors with Cortex-A715 cores
128+
* - Processors with Cortex-X1 cores
129+
* - Processors with Cortex-X2 cores
130+
* - Processors with Cortex-X3 cores
131+
* - Processors with Exynos M4 cores
132+
* - Processors with Exynos M5 cores
133+
* - Neoverse N1 cores
134+
* - Neoverse N2 cores
135+
* - Neoverse V1 cores
107136
*/
108137
switch (midr & (CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK)) {
138+
case UINT32_C(0x4100D060): /* Cortex-A65 */
109139
case UINT32_C(0x4100D0B0): /* Cortex-A76 */
140+
case UINT32_C(0x4100D0C0): /* Neoverse N1 */
110141
case UINT32_C(0x4100D0D0): /* Cortex-A77 */
111142
case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
112-
case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
143+
case UINT32_C(0x4100D400): /* Neoverse V1 */
144+
case UINT32_C(0x4100D410): /* Cortex-A78 */
145+
case UINT32_C(0x4100D440): /* Cortex-X1 */
113146
case UINT32_C(0x4100D460): /* Cortex-A510 */
114147
case UINT32_C(0x4100D470): /* Cortex-A710 */
115148
case UINT32_C(0x4100D480): /* Cortex-X2 */
149+
case UINT32_C(0x4100D490): /* Neoverse N2 */
150+
case UINT32_C(0x4100D4D0): /* Cortex-A715 */
151+
case UINT32_C(0x4100D4E0): /* Cortex-X3 */
152+
case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
116153
case UINT32_C(0x51008040): /* Kryo 485 Gold (Cortex-A76) */
117154
case UINT32_C(0x51008050): /* Kryo 485 Silver (Cortex-A55) */
118-
case UINT32_C(0x53000030): /* Exynos-M4 */
119-
case UINT32_C(0x53000040): /* Exynos-M5 */
155+
case UINT32_C(0x53000030): /* Exynos M4 */
156+
case UINT32_C(0x53000040): /* Exynos M5 */
120157
isa->dot = true;
121158
break;
122159
case UINT32_C(0x4100D050): /* Cortex A55: revision 1 or later only */

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